?????????? ????????? - ??????????????? - /home/agenciai/public_html/cd38d8/adc.tar
???????
ad_sigma_delta.h 0000644 00000010421 15127623356 0007642 0 ustar 00 /* SPDX-License-Identifier: GPL-2.0-only */ /* * Support code for Analog Devices Sigma-Delta ADCs * * Copyright 2012 Analog Devices Inc. * Author: Lars-Peter Clausen <lars@metafoo.de> */ #ifndef __AD_SIGMA_DELTA_H__ #define __AD_SIGMA_DELTA_H__ enum ad_sigma_delta_mode { AD_SD_MODE_CONTINUOUS = 0, AD_SD_MODE_SINGLE = 1, AD_SD_MODE_IDLE = 2, AD_SD_MODE_POWERDOWN = 3, }; /** * struct ad_sigma_delta_calib_data - Calibration data for Sigma Delta devices * @mode: Calibration mode. * @channel: Calibration channel. */ struct ad_sd_calib_data { unsigned int mode; unsigned int channel; }; struct ad_sigma_delta; struct device; struct iio_dev; /** * struct ad_sigma_delta_info - Sigma Delta driver specific callbacks and options * @set_channel: Will be called to select the current channel, may be NULL. * @set_mode: Will be called to select the current mode, may be NULL. * @postprocess_sample: Is called for each sampled data word, can be used to * modify or drop the sample data, it, may be NULL. * @has_registers: true if the device has writable and readable registers, false * if there is just one read-only sample data shift register. * @addr_shift: Shift of the register address in the communications register. * @read_mask: Mask for the communications register having the read bit set. * @data_reg: Address of the data register, if 0 the default address of 0x3 will * be used. * @irq_flags: flags for the interrupt used by the triggered buffer */ struct ad_sigma_delta_info { int (*set_channel)(struct ad_sigma_delta *, unsigned int channel); int (*set_mode)(struct ad_sigma_delta *, enum ad_sigma_delta_mode mode); int (*postprocess_sample)(struct ad_sigma_delta *, unsigned int raw_sample); bool has_registers; unsigned int addr_shift; unsigned int read_mask; unsigned int data_reg; unsigned long irq_flags; }; /** * struct ad_sigma_delta - Sigma Delta device struct * @spi: The spi device associated with the Sigma Delta device. * @trig: The IIO trigger associated with the Sigma Delta device. * * Most of the fields are private to the sigma delta library code and should not * be accessed by individual drivers. */ struct ad_sigma_delta { struct spi_device *spi; struct iio_trigger *trig; /* private: */ struct completion completion; bool irq_dis; bool bus_locked; bool keep_cs_asserted; uint8_t comm; const struct ad_sigma_delta_info *info; /* * DMA (thus cache coherency maintenance) requires the * transfer buffers to live in their own cache lines. * 'tx_buf' is up to 32 bits. * 'rx_buf' is up to 32 bits per sample + 64 bit timestamp, * rounded to 16 bytes to take into account padding. */ uint8_t tx_buf[4] ____cacheline_aligned; uint8_t rx_buf[16] __aligned(8); }; static inline int ad_sigma_delta_set_channel(struct ad_sigma_delta *sd, unsigned int channel) { if (sd->info->set_channel) return sd->info->set_channel(sd, channel); return 0; } static inline int ad_sigma_delta_set_mode(struct ad_sigma_delta *sd, unsigned int mode) { if (sd->info->set_mode) return sd->info->set_mode(sd, mode); return 0; } static inline int ad_sigma_delta_postprocess_sample(struct ad_sigma_delta *sd, unsigned int raw_sample) { if (sd->info->postprocess_sample) return sd->info->postprocess_sample(sd, raw_sample); return 0; } void ad_sd_set_comm(struct ad_sigma_delta *sigma_delta, uint8_t comm); int ad_sd_write_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg, unsigned int size, unsigned int val); int ad_sd_read_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg, unsigned int size, unsigned int *val); int ad_sd_reset(struct ad_sigma_delta *sigma_delta, unsigned int reset_length); int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, int *val); int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, unsigned int mode, unsigned int channel); int ad_sd_calibrate_all(struct ad_sigma_delta *sigma_delta, const struct ad_sd_calib_data *cd, unsigned int n); int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev, struct spi_device *spi, const struct ad_sigma_delta_info *info); int devm_ad_sd_setup_buffer_and_trigger(struct device *dev, struct iio_dev *indio_dev); int ad_sd_validate_trigger(struct iio_dev *indio_dev, struct iio_trigger *trig); #endif qcom-vadc-common.h 0000644 00000012513 15127623356 0010071 0 ustar 00 /* SPDX-License-Identifier: GPL-2.0 */ /* * Code shared between the different Qualcomm PMIC voltage ADCs */ #ifndef QCOM_VADC_COMMON_H #define QCOM_VADC_COMMON_H #include <linux/math.h> #include <linux/types.h> #define VADC_CONV_TIME_MIN_US 2000 #define VADC_CONV_TIME_MAX_US 2100 /* Min ADC code represents 0V */ #define VADC_MIN_ADC_CODE 0x6000 /* Max ADC code represents full-scale range of 1.8V */ #define VADC_MAX_ADC_CODE 0xa800 #define VADC_ABSOLUTE_RANGE_UV 625000 #define VADC_RATIOMETRIC_RANGE 1800 #define VADC_DEF_PRESCALING 0 /* 1:1 */ #define VADC_DEF_DECIMATION 0 /* 512 */ #define VADC_DEF_HW_SETTLE_TIME 0 /* 0 us */ #define VADC_DEF_AVG_SAMPLES 0 /* 1 sample */ #define VADC_DEF_CALIB_TYPE VADC_CALIB_ABSOLUTE #define VADC_DECIMATION_MIN 512 #define VADC_DECIMATION_MAX 4096 #define ADC5_DEF_VBAT_PRESCALING 1 /* 1:3 */ #define ADC5_DECIMATION_SHORT 250 #define ADC5_DECIMATION_MEDIUM 420 #define ADC5_DECIMATION_LONG 840 /* Default decimation - 1024 for rev2, 840 for pmic5 */ #define ADC5_DECIMATION_DEFAULT 2 #define ADC5_DECIMATION_SAMPLES_MAX 3 #define VADC_HW_SETTLE_DELAY_MAX 10000 #define VADC_HW_SETTLE_SAMPLES_MAX 16 #define VADC_AVG_SAMPLES_MAX 512 #define ADC5_AVG_SAMPLES_MAX 16 #define PMIC5_CHG_TEMP_SCALE_FACTOR 377500 #define PMIC5_SMB_TEMP_CONSTANT 419400 #define PMIC5_SMB_TEMP_SCALE_FACTOR 356 #define PMI_CHG_SCALE_1 -138890 #define PMI_CHG_SCALE_2 391750000000LL #define VADC5_MAX_CODE 0x7fff #define ADC5_FULL_SCALE_CODE 0x70e4 #define ADC5_USR_DATA_CHECK 0x8000 #define R_PU_100K 100000 #define RATIO_MAX_ADC7 BIT(14) /* * VADC_CALIB_ABSOLUTE: uses the 625mV and 1.25V as reference channels. * VADC_CALIB_RATIOMETRIC: uses the reference voltage (1.8V) and GND for * calibration. */ enum vadc_calibration { VADC_CALIB_ABSOLUTE = 0, VADC_CALIB_RATIOMETRIC }; /** * struct vadc_linear_graph - Represent ADC characteristics. * @dy: numerator slope to calculate the gain. * @dx: denominator slope to calculate the gain. * @gnd: A/D word of the ground reference used for the channel. * * Each ADC device has different offset and gain parameters which are * computed to calibrate the device. */ struct vadc_linear_graph { s32 dy; s32 dx; s32 gnd; }; /** * enum vadc_scale_fn_type - Scaling function to convert ADC code to * physical scaled units for the channel. * SCALE_DEFAULT: Default scaling to convert raw adc code to voltage (uV). * SCALE_THERM_100K_PULLUP: Returns temperature in millidegC. * Uses a mapping table with 100K pullup. * SCALE_PMIC_THERM: Returns result in milli degree's Centigrade. * SCALE_XOTHERM: Returns XO thermistor voltage in millidegC. * SCALE_PMI_CHG_TEMP: Conversion for PMI CHG temp * SCALE_HW_CALIB_DEFAULT: Default scaling to convert raw adc code to * voltage (uV) with hardware applied offset/slope values to adc code. * SCALE_HW_CALIB_THERM_100K_PULLUP: Returns temperature in millidegC using * lookup table. The hardware applies offset/slope to adc code. * SCALE_HW_CALIB_XOTHERM: Returns XO thermistor voltage in millidegC using * 100k pullup. The hardware applies offset/slope to adc code. * SCALE_HW_CALIB_THERM_100K_PU_PM7: Returns temperature in millidegC using * lookup table for PMIC7. The hardware applies offset/slope to adc code. * SCALE_HW_CALIB_PMIC_THERM: Returns result in milli degree's Centigrade. * The hardware applies offset/slope to adc code. * SCALE_HW_CALIB_PMIC_THERM: Returns result in milli degree's Centigrade. * The hardware applies offset/slope to adc code. This is for PMIC7. * SCALE_HW_CALIB_PM5_CHG_TEMP: Returns result in millidegrees for PMIC5 * charger temperature. * SCALE_HW_CALIB_PM5_SMB_TEMP: Returns result in millidegrees for PMIC5 * SMB1390 temperature. */ enum vadc_scale_fn_type { SCALE_DEFAULT = 0, SCALE_THERM_100K_PULLUP, SCALE_PMIC_THERM, SCALE_XOTHERM, SCALE_PMI_CHG_TEMP, SCALE_HW_CALIB_DEFAULT, SCALE_HW_CALIB_THERM_100K_PULLUP, SCALE_HW_CALIB_XOTHERM, SCALE_HW_CALIB_THERM_100K_PU_PM7, SCALE_HW_CALIB_PMIC_THERM, SCALE_HW_CALIB_PMIC_THERM_PM7, SCALE_HW_CALIB_PM5_CHG_TEMP, SCALE_HW_CALIB_PM5_SMB_TEMP, SCALE_HW_CALIB_INVALID, }; struct adc5_data { const u32 full_scale_code_volt; const u32 full_scale_code_cur; const struct adc5_channels *adc_chans; const struct iio_info *info; unsigned int *decimation; unsigned int *hw_settle_1; unsigned int *hw_settle_2; }; int qcom_vadc_scale(enum vadc_scale_fn_type scaletype, const struct vadc_linear_graph *calib_graph, const struct u32_fract *prescale, bool absolute, u16 adc_code, int *result_mdec); struct qcom_adc5_scale_type { int (*scale_fn)(const struct u32_fract *prescale, const struct adc5_data *data, u16 adc_code, int *result); }; int qcom_adc5_hw_scale(enum vadc_scale_fn_type scaletype, unsigned int prescale_ratio, const struct adc5_data *data, u16 adc_code, int *result_mdec); u16 qcom_adc_tm5_temp_volt_scale(unsigned int prescale_ratio, u32 full_scale_code_volt, int temp); u16 qcom_adc_tm5_gen2_temp_res_scale(int temp); int qcom_adc5_prescaling_from_dt(u32 num, u32 den); int qcom_adc5_hw_settle_time_from_dt(u32 value, const unsigned int *hw_settle); int qcom_adc5_avg_samples_from_dt(u32 value); int qcom_adc5_decimation_from_dt(u32 value, const unsigned int *decimation); int qcom_vadc_decimation_from_dt(u32 value); #endif /* QCOM_VADC_COMMON_H */ stm32-dfsdm-adc.h 0000644 00000001031 15127623356 0007512 0 ustar 00 /* SPDX-License-Identifier: GPL-2.0 */ /* * This file discribe the STM32 DFSDM IIO driver API for audio part * * Copyright (C) 2017, STMicroelectronics - All Rights Reserved * Author(s): Arnaud Pouliquen <arnaud.pouliquen@st.com>. */ #ifndef STM32_DFSDM_ADC_H #define STM32_DFSDM_ADC_H #include <linux/iio/iio.h> int stm32_dfsdm_get_buff_cb(struct iio_dev *iio_dev, int (*cb)(const void *data, size_t size, void *private), void *private); int stm32_dfsdm_release_buff_cb(struct iio_dev *iio_dev); #endif adi-axi-adc.h 0000644 00000003673 15127623356 0007001 0 ustar 00 /* SPDX-License-Identifier: GPL-2.0 */ /* * Analog Devices Generic AXI ADC IP core driver/library * Link: https://wiki.analog.com/resources/fpga/docs/axi_adc_ip * * Copyright 2012-2020 Analog Devices Inc. */ #ifndef __ADI_AXI_ADC_H__ #define __ADI_AXI_ADC_H__ struct device; struct iio_chan_spec; /** * struct adi_axi_adc_chip_info - Chip specific information * @name Chip name * @id Chip ID (usually product ID) * @channels Channel specifications of type @struct iio_chan_spec * @num_channels Number of @channels * @scale_table Supported scales by the chip; tuples of 2 ints * @num_scales Number of scales in the table * @max_rate Maximum sampling rate supported by the device */ struct adi_axi_adc_chip_info { const char *name; unsigned int id; const struct iio_chan_spec *channels; unsigned int num_channels; const unsigned int (*scale_table)[2]; int num_scales; unsigned long max_rate; }; /** * struct adi_axi_adc_conv - data of the ADC attached to the AXI ADC * @chip_info chip info details for the client ADC * @preenable_setup op to run in the client before enabling the AXI ADC * @reg_access IIO debugfs_reg_access hook for the client ADC * @read_raw IIO read_raw hook for the client ADC * @write_raw IIO write_raw hook for the client ADC */ struct adi_axi_adc_conv { const struct adi_axi_adc_chip_info *chip_info; int (*preenable_setup)(struct adi_axi_adc_conv *conv); int (*reg_access)(struct adi_axi_adc_conv *conv, unsigned int reg, unsigned int writeval, unsigned int *readval); int (*read_raw)(struct adi_axi_adc_conv *conv, struct iio_chan_spec const *chan, int *val, int *val2, long mask); int (*write_raw)(struct adi_axi_adc_conv *conv, struct iio_chan_spec const *chan, int val, int val2, long mask); }; struct adi_axi_adc_conv *devm_adi_axi_adc_conv_register(struct device *dev, size_t sizeof_priv); void *adi_axi_adc_conv_priv(struct adi_axi_adc_conv *conv); #endif Makefile 0000644 00000000225 15127650730 0006211 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 # # Makefile for industrial I/O ADC drivers # obj-$(CONFIG_AD7816) += ad7816.o obj-$(CONFIG_AD7280) += ad7280a.o Kconfig 0000644 00000001353 15127650730 0006057 0 ustar 00 # SPDX-License-Identifier: GPL-2.0 # # ADC drivers # menu "Analog to digital converters" config AD7816 tristate "Analog Devices AD7816/7/8 temperature sensor and ADC driver" depends on SPI depends on GPIOLIB || COMPILE_TEST help Say yes here to build support for Analog Devices AD7816/7/8 temperature sensors and ADC. To compile this driver as a module, choose M here: the module will be called ad7816. config AD7280 tristate "Analog Devices AD7280A Lithium Ion Battery Monitoring System" depends on SPI select CRC8 help Say yes here to build support for Analog Devices AD7280A Lithium Ion Battery Monitoring System. To compile this driver as a module, choose M here: the module will be called ad7280a endmenu at91-sama5d2_adc.h 0000644 00000000701 15127702367 0007544 0 ustar 00 /* SPDX-License-Identifier: GPL-2.0 */ /* * This header provides constants for configuring the AT91 SAMA5D2 ADC */ #ifndef _DT_BINDINGS_IIO_ADC_AT91_SAMA5D2_ADC_H #define _DT_BINDINGS_IIO_ADC_AT91_SAMA5D2_ADC_H /* X relative position channel index */ #define AT91_SAMA5D2_ADC_X_CHANNEL 24 /* Y relative position channel index */ #define AT91_SAMA5D2_ADC_Y_CHANNEL 25 /* pressure channel index */ #define AT91_SAMA5D2_ADC_P_CHANNEL 26 #endif fsl-imx25-gcq.h 0000644 00000001235 15127702367 0007226 0 ustar 00 /* SPDX-License-Identifier: GPL-2.0 */ /* * This header provides constants for configuring the I.MX25 ADC */ #ifndef _DT_BINDINGS_IIO_ADC_FS_IMX25_GCQ_H #define _DT_BINDINGS_IIO_ADC_FS_IMX25_GCQ_H #define MX25_ADC_REFP_YP 0 /* YP voltage reference */ #define MX25_ADC_REFP_XP 1 /* XP voltage reference */ #define MX25_ADC_REFP_EXT 2 /* External voltage reference */ #define MX25_ADC_REFP_INT 3 /* Internal voltage reference */ #define MX25_ADC_REFN_XN 0 /* XN ground reference */ #define MX25_ADC_REFN_YN 1 /* YN ground reference */ #define MX25_ADC_REFN_NGND 2 /* Internal ground reference */ #define MX25_ADC_REFN_NGND2 3 /* External ground reference */ #endif ingenic,adc.h 0000644 00000000654 15127702367 0007074 0 ustar 00 /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _DT_BINDINGS_IIO_ADC_INGENIC_ADC_H #define _DT_BINDINGS_IIO_ADC_INGENIC_ADC_H /* ADC channel idx. */ #define INGENIC_ADC_AUX 0 #define INGENIC_ADC_BATTERY 1 #define INGENIC_ADC_AUX2 2 #define INGENIC_ADC_TOUCH_XP 3 #define INGENIC_ADC_TOUCH_YP 4 #define INGENIC_ADC_TOUCH_XN 5 #define INGENIC_ADC_TOUCH_YN 6 #define INGENIC_ADC_TOUCH_XD 7 #define INGENIC_ADC_TOUCH_YD 8 #endif
| ver. 1.6 |
Github
|
.
| PHP 8.2.30 | ??????????? ?????????: 0 |
proxy
|
phpinfo
|
???????????